The present invention following relates to a semiconductor integrated circuit, and more particularly, to a semiconductor integrated circuit including an offset voltage measuring apparatus.
A highly integrated memory apparatus such as a dynamic random access memory (DRAM) typically includes a high-precision sense amplifier which can accurately sense and amplify a weak signal stored in a cell, and transmit the signal out. Likewise, a high-performance logic apparatus including an analog-digital-converter (ADC) typically includes a high-precision comparator to increase precision.
In such circuits, offset voltage of an input transistor of an amplifier has to be kept below a critical value to improve precision.
As integrated circuits become more complicated and highly integrated, transistors of an input terminal of the amplifier have become smaller, resulting in higher offset voltage. Thus, to control the offset voltage, an apparatus which can easily and precisely measure the offset voltage is needed in a semiconductor apparatus.
However, conventionally, the offset voltage has been difficult to directly measure by an external apparatus. One approach is to measure the offset voltage indirectly via a test process, or a statistical process. Such processes take a long time. In addition, an exact offset voltage is difficult to measure by such indirect processes.